A display apparatus may comprise a gate driving circuit for driving a pixel circuit, for example, a gate driving circuit using a Gate on Array (GOA) technology. The gate driving circuit may comprise cascaded shift register circuits (referred to as SR circuits, or gate driving circuits or GOA circuits), in which an input clock signal is converted by the shift register circuits and is then applied to gate lines of various rows of pixels of the display apparatus in sequence, to control display of the display apparatus row by row. In an arrangement of the gate driving circuit, it needs to use an output from a certain next stage of shift register circuit to reset a certain previous stage of shift register circuit. For example, in a case that a single stage of shift register circuit is used as a group to turn on only one row of pixel circuits at the same time, for an nth stage of shift register circuit, it needs to use an output from an (n+1)th stage of shift register circuit as a reset input of the nth stage of shift register circuit.
However, for last stages of shift register circuits, for example, a last stage of shift register circuit in the above exemplary case, there are no other shift register circuits next to the last stage of shift register circuit, and therefore separate reset shift register circuits need to be provided to implement such a reset function, which may adversely affect operation characteristics of the last stages of shift register circuits.